MICRON TECHNOLOGY INC

Principal Engineer- DEG Design

A-22237-12278 L-1 2023 Certified

Salary

$93,787

Visa Type

L-1

Job Title

Principal Engineer- DEG Design

Employee's Citizenship

SOUTH KOREA

Graduate School

SOGANG UNIVERSITY

Case info Company Info HR Info Attorney Position Info Employee Info

Case info

9 fields

Data Publish Year 2023

Case Number A-22237-12278

Case Status Certified

Received Date 2022-09-26

Decision Date 2023-08-02

Refile N

Original File Date -

Previous State Work Force Agency (SWA) Case Number Stete -

Schedule A or a Sheepherder Occupation N

Company Info

14 fields

Employer Name MICRON TECHNOLOGY INC

Employer Address_Line 1 8000 S FEDERAL WAY

Employer Address_Line 2 -

Employer City BOISE

State -

Employer State/ Province IDAHO

Employer Country UNITED STATES OF AMERICA

Employer Postal Code 83716

Employer Phone No. 208-368-4000

Employer Phone Extent No. -

Total Number of Employees 9000

Employer Year of Commenced 1978

NAICS Code 334413

Foreign Worker Ownership & Interest N

HR Info

9 fields

Employer Contact Name Manuel Caudevilla

Employer Contact Address Line1 8000 S. Federal Way

Employer Contact Address Line2 -

Employer Contact City Boise

Employer Contact State/ Provice IDAHO

Employer Contact Country UNITED STATES OF AMERICA

Employer Contact Post Code 83716

Employer Contact Phone (208) 488-1730

Employer Contact Email mcaudevilla@micron.com

Attorney

11 fields

Agent/ Attorney Name Tobias Boydstun

Agent/ Attorney Firm Name Berry Appleman Leiden LLP

Agent/ Attorney Phone 4695052993

Agent/ Attorney Phone Ext. -

Agent/ Attorney Address Line 1 10100 Katy Freeway

Agent/ Attorney Address Line 2 Suite 600

Agent/ Attorney City Houston

Agent/ Attorney State/ Province -

Agent/ Attorney Country UNITED STATES OF AMERICA

Agent/ Attorney Postal Code -

Agent/ Attorney Email tboydstun@bal.com

Position Info

89 fields

Prevailing Wage Track Number P10021341748391

Prevailing Wage SOC Code 17-2072

Prevailing Wage SOC Title Electronics Engineers, Except Computer

Prevailing Wage Skill Level Level II

Prevailing Wage 93787

Prevailing Wage Unit of Pay Year

Prevailing Wage Source OES

Prevailing Wage Other Source -

Prevailing Wage Determination Date 2022-06-09

Prevailing Wage Expiration Date 2022-09-07

Wage Offer From 152470

Wage Offer To 172470

Wage Offer Unit of Pay Year

Workstie Address Line 1 8000 S. Federal Way

Worksite Address Line 2 -

Worksite City Boise

Worksite State IDAHO

Worksite Postal Code 83716

Job Title Principal Engineer- DEG Design

Minimum Education Master's

Other Degree/ Diploma -

Major Field of Study See H.14

Required Training N

Required Training Month -

Required Field of Training -

Required Experience N

Required Expreience Months -

Accept Alternate Field of Study Y

Accept Alternate Major See H.14

Alternate Combination of Education/ Experience Y

Required Alternate Level of Education Bachelor's

Other Alternate Level of Education -

Acceptable Years of Experience 2

Accept Foreign Educationa Y

Acceptable Alternate Occupation N

Acceptable Alternate Occupation Month -

Accept Alternate Job Title -

Normal Requirements of Job Opportunity Y

Required Foreign Language N

Specific Skills Employer will accept a Masters degree or foreign equivalent in electrical engineering, electronic engineering or related field. Alternatively, employer will accept a Bachelors degree orbr foreign equivalent in electrical engineering, electronic engineering or related field and two 2 years of work experience in job Offered or two 2 years related experience.br br If Masters, position requires completion of a universitylevel course, research project, internship, or thesis or 6 months of experience involving the following if Bachelors, position requiresbr 2 years of experience in the followingbr 1 Contributing to the development of new memory products by assisting with the overall design, layout, and optimization of memory circuits;br 2 Performing circuit simulations using standard industry simulators such as spice and verilog;br 3 collaborating with other skilled designers to development key schematic blocks such as memory array, input buffer, output buffer, control logic, address decode, datapath, and internalbr test logic;br 4 Building new circuit designs;br 5 Executing reliability verification;br 6 Interpreting product specifications in order to product the required functionality;br 7 Optimizing design rules for cost, performance and functionality;br 8 Importing layout parasitic information info the circuit simulation environment;br 9 Performing silicon versus schematic versus layout verification on required circuits

Combination Occupation N

Offered to Applied Foreign Worker Y

ForeignWorker Live on Premises N

Live in Domestic Service Worker N

Employment Contract -

Professional Occupation Y

College/ University Teacher N

Competitive Process -

Basic Recruitment Process -

Teacher Select Date -

Teacher Publish Journal Name -

Additional Recruitment Information -

Job Oder Start Date 2022-07-13

Job Oder End Date 2022-08-16

Sunday Edition Newspaper Y

First Newspaper Name Idaho Statesman

First Advertisement Start Date 2022-07-24

Second Newspaper Name Idaho Statesman

Second Advertisement Type Newspaper

Second Ad Start Date 2022-07-31

Job Fair From Date -

Job Fair to Date -

On Campus Recruiting from Date -

On Campus Recruiting to Date -

Employer Website from Date -

Employer Website to Date -

Pro. Org. Ad from Date 2022-08-01

Pro.Org. Ad to Date 2022-08-01

Job Search Website from Date 2022-07-13

Job Search Website to Date 2022-07-20

Private Employment Firm from Date -

Pricate Employment Firm to Date -

Employee Referral Program from Date -

Employee Referral Program to Date -

Campus Placement from Date -

Campus Placement to Date -

Local Ethnic Newspaper from Date 2022-07-26

Local Ethnic Newspaper to Date 2022-07-26

Radio/TV Ad from Date -

Radio/TV Ad to Date -

Employer Received the Payment N

Payment Details -

Bargaining Representative Notified N/A

Posted Notice at Worksite Y

Layoff in Past Six Months N

US Worker Considered -

Country of Citizenship SOUTH KOREA

Foreign Worker Birth Country SOUTH KOREA

Class of Admission L-1

Employee Info

24 fields

Foreign Worker Education Master's

Foreign Worker Education Other -

Foreign Worker Major ELECTRONIC ENGINEERING

Year of Compelted Education 2004

Foreign Worker Istitution of Eduation SOGANG UNIVERSITY

Foreign Worker Education Instution Address Line 1 35 BAEKBEOMRO, MAPOGU,

Foreign Worker Education Institution Address Line 2 -

Foreign Worker Education Institution City SEOUL

Foreign Worker Educatution Institution State -

Foreign Worker Education Institution Country SOUTH KOREA

Foreign Worker Education Training Post Code 4107

Foreign Worker Training Completion N/A

Foreign Worker Required Experience N/A

Foreign Worker Alternate Education and Experience N

Foreign Worker Alternate Occupation Experience N/A

Foreign Worker Experience with Employer N

Foreign Worker Employer Pay for Education N

Foreign Worker Currently Employed Y

Employer Completed Application N

Preparer Name Tobias Boydstun

Preparer Title Associate

Preparer Email tboydstun@bal.com

Employer Information Declaration Name Manuel Caudevilla

Employer Declaration Title Sr. Global Immigration Specialist